Semiconductor chip power is typically supplied on-chip at a single, predetermined voltage level. Chip designers typically specify, a single, predetermined voltage level for reasons of standardization and convenience. Accordingly, as chip standards migrate from one on-chip voltage level to another, difficulties arise during transition periods. During such times of transition, new chips designed to operate at voltage levels according to the new standard voltage level may desirably be mounted on circuit boards and be incorporated into electronic systems designed to operate at the former standard voltage level.
Unfortunately, semiconductor chips designed to the new standard voltage will not generally make provision to accommodate the voltage level previously widely recognized and followed. It is typically presumed that either the entire electronics system into which the new chip design is to be incorporated will operate at the new voltage level, or that some off-chip solution will be provided to create voltage compatibility between subsystems and chips operating at separate voltage level.
Additionally, in the general case, a chip which operates at a given voltage level is not able to recognize that it has been provided with a nonstandard voltage level. There has been a failure of semiconductor chip designers to provide an on-chip solution for power provided at an arbitrary voltage level to be automatically converted to a desired internal operating voltage level. This creates serious compatibility problems for the semiconductor industry during a period of accelerating miniaturization.
This increased miniaturization of chip geometries in the semiconductor industry makes it increasingly necessary to develop new solutions and chip designs which can accommodate a plurality of on-chip voltage levels. One aspect of the trend toward miniaturization is the use of increasingly thin gate oxide layers for CMOS devices fabricated in the industry. This has resulted in an increased recent motivation and an urgent need for semiconductor circuits to be able to accommodate both 5.0 volt and 3.3 volt on-chip voltage levels. It is anticipated that in the near future even lower on-chip voltage levels, such as for example 2.2 volts and 1.1 visits are likely to develop into the required circuit design norm.
It is accordingly an object of the invention herein to provide an on-chip voltage conversion solution for semiconductor chips manufactured during technology transition periods in which the semiconductor industry worldwide converts from one standard internal semiconductor chip voltage level to another.
It is an object of the invention herein to develop semiconductor circuit chips which are operable at a plurality of internal semiconductor chip voltage levels.
It is yet another object of the invention herein to provide an on-chip semiconductor design approach which converts internal voltage levels from a standard 5.0 voltage level to 3.3 volts.